1. Field of the Invention
The present invention relates to an image display apparatus provided with image forming devices arranged in a matrix, and more particularly to a signal processing unit which is applicable to a television receiver or a display apparatus, utilizing a display panel provided with plural surface conduction devices wired in a matrix and a phosphor plate for emitting light by receiving the irradiation of electron beams from such surface conduction devices and adapted to display an image by receiving a television signal or a display signal from a computer, and which is composed of image data adjustment means for adjusting the drop in the drive voltage resulting from the electrical resistance in the matrix wirings of the aforementioned display panel and gray scale number conversion means for converting the number of gradation levels of the image data or the adjustment data.
2. Related Background Art
Within such image display apparatus, the Japanese Patent Application Laid-open No. 8-248920 discloses an image display apparatus having a configuration, in order to adjust the luminance loss resulting from the voltage drop in the wiring resistance such as the wirings for electrical connection to the electron emitting devices, of calculating adjustmnent data by statistical calculation and synthesizing the requested value of the electron beam and the adjustment value.
FIG. 18 is a schematic block diagram showing the configuration of an image display apparatus of conventional technology.
In the following there will be explained the configuration relating to the data adjustment.
At first luminance data of a line of digital image signal are added in an adder 206, and adjustment rate data corresponding to the added value are read from a memory 207. On the other hand, the digital image signal is subjected to serial/parallel conversion in a shift register 204, then held for a predetermined time in a latch circuit 205 and entered at predetermined timings into multipliers 208 provided respectively in the column wirings.
For each column wiring, the multiplier 208 multiplies the luminance data with the adjustment data read from the memory 207, and the obtained data after adjustment are transferred to a modulation signal generator 209 to generate a modulation signal corresponding to the adjusted data, whereby an image displayed on the display panel based on such modulation signal.
As explained in the foregoing, there is executed a statistical calculation on the digital image signal such as the calculation of sum or average, such as the addition calculation of the luminance data of a line of the digital luminance data in the adder 206, and the adjustment is executed based on the result of such statistical calculation.
On the other hand, in the dither processing for the image signal, it is already known to obtain a multi-value image signal by a dither matrix, as disclosed in the Japanese Patent Application Laid-open No. 63-213084.
However, in such conventional configurations, there is required a hardware of a large magnitude such as multipliers respectively for the column wirings, a memory for supplying the adjustment data and an adder for providing the memory with address signals.
Also there has been a drawback that such adjustment involves discarding of bits of the digital data, thereby resulting in deterioration of the gradation of the image.